Signal output unit and electronic control unit

ABSTRACT

A timer module in an ECU has an angle counter and a timer counter. A value counted by the angle counter indicates a crank angle of a crankshaft. Under the control of the termination to output an ignition pulse signal to an igniter, the ECU inverts the level of the ignition pulse signal to Low level (as an inactive mode) when a first comparator outputs an angle comparison matching signal after a value of the angle counter reaches a pulse OFF angle “an 12 ” count value of the angle counter, and when a second comparator outputs a time comparison matching signal after the value of the time counter reaches a time “t 12 ” as an elapsed time of a regular time length “TH” counted from a pulse ON time “t 11 ”. Thus, even if the crank angle of the crankshaft reaches the pulse OFF angle “an 12 ” before the timing “t 12 ”, the ECU keeps High level of the ignition pulse signal until the timing “t 12”.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application is related to and claims priority from Japanese PatentApplication No. 2005-247813 filed on Aug. 29, 2005, the contents ofwhich are hereby incorporated by reference.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention generally relates to a signal output unit such asa timer module and an electronic control unit such as an engine controlunit (ECU) equipped with the signal output unit, capable of switching alevel of an output signal according to a rotation angle of a rotarybody.

2. Description of the Related Art

An electronic control unit such as an engine control unit (ECU) forcontrolling the operation of a vehicle engine such as an internalcombustion engine mounted on a vehicle inputs a crank signal transferredfrom a crank sensor. The crank signal has an edge generated every aspecified angle corresponding to the rotation of a crankshaft of theengine. The ECU instructs an angle counter so that it counts up based onevery receiving the crank signal. This angle counter outputs a rotationangle (as a crank angle) of the crankshaft in a cycle of the engine. TheECU monitors the crank angle based on the counted value of the anglecounter and outputs an instruction signal to active an injector (or afuel injection valve) and an igniter (or an ignition unit).

For example, three patent documents have disclosed such a conventionaltechnique about the ECU, the Japanese patent laid open publications, No.P 2001-200747, JP 2001-214790, and JP 2001-271700.

A description will now be given of the configuration of hardware and amanner thereof configured to output an injection pulse signal to operatethe injector with reference to FIGS. 13A and 13B.

FIG. 13A is a block diagram showing a schematic configuration of ahardware circuit capable of outputting an injection pulse signal. Thehardware circuit consists of an angle counter 101, a comparison matchingregister 103, a comparator 105, and a down counter 107. A centralprocessing unit (CPU, omitted from the drawings) sets a value to thecomparison matching register 103 to be compared with the value stored inthe angle counter 101.

When comparing the value stored in the angle counter 101 with the valuestored in the comparison matching register 103 and the comparison resultindicates that the value stored in the angle counter 101 reaches thevalue set in the comparison matching register 103, the comparator 105outputs a comparison matching signal to the down counter 107. The CPUsets a data item corresponding to an optional time length to the downcounter 107 in advance. The down counter 107 receives the comparisonmatching signal transferred from the comparator 105 as a pulse ONtrigger signal. The pulse ON trigger signal changes the level of theoutput signal of the down counter 107, as an injection pulse signal, toan active voltage level by which the fuel injection valve becomes open.

Under the condition in which the active voltage level of the injectionpulse signal is High level, when receiving the comparison matchingsignal transferred from the comparator 105, the down counter 107switches Low level of its output signal to High level, and initiates thecounting down operation from the value stored in advance therein. Whenthe counting down operation reaches zero, namely, when the time lengthcorresponding to the pre-set value has elapsed, the down counter 107provides Low level of its output signal switched from High level.

As shown in FIG. 13B, the CPU (omitted from FIG. 13A and FIG. 13B) setsthe injection start angle “an1” of the fuel injection valve to thecomparison matching register 103 and sets the fuel injection time length“Tf1” to the down counter 107 in advance. The fuel injection time length“Tf1” corresponds to the time length of High level of the injectionpulse signal and also corresponds to the open time length of the fuelinjection valve.

When the crank angle of the crankshaft reaches the injection start angle“an1”, and the comparator 105 outputs the comparison matching signal tothe down counter 107, the down counter 107 receives the comparisonmatching signal and outputs the injection pulse signal of High level (asits output signal). The fuel injection process thereby initiates. Afterthis, when the fuel injection time length “Tf1” has elapsed and thecount value of the down counter 107 reaches zero, the down counter 107outputs the injection pulse signal (as its output signal) of Low level.This indicates the completion of the fuel injection process.

As shown in FIG. 13B, there is split injection in which the amount ofinjection to each cylinder is divided into plural injections, forexample, into two injections in this explanation. On performing such asplit injection, the CPU sets an injection start angle “an2” for thesecondary injection to the comparison matching register 103 at thetiming “tof1” (see FIG. 13B) at which the injection pulse signal for theprimary fuel injection is switched from High level to Low level. The CPUfurther sets the value corresponding to the secondary fuel injectiontiming “Tf2” to the down counter 107 in advance.

However, the split injection process has a timing limitation. It isnecessary to keep the time interval between both the injection pulsesignals for the primary and secondary fuel injections (namely, the timeinterval counted from High level to following Low level) by a regularlength “TL”. On such a timing limitation between the primary injectionand secondary injection, the CPU performs following process (1) andprocess (2) at the timing “tof1” at which the injection pulse signal isswitched from High level to Low level for the primary fuel injection.

(1) At first, the CPU calculates the crank angle “an3” when the regulartime length “TL” has been elapsed counted from the current timing “tof1”based on the rotation speed of the crankshaft currently detected at thistiming; and

(2) The calculated crank angle “an3” is then compared with the injectionstart angle “an2” for the secondary injection. When the injection startangle “an2” is latter in angle than the calculated crank angle “an3”,the injection start angle “an2” is set to the comparison matchingregister 103. If the calculated crank angle “an3” is later in angle thanthe injection start angle “an2”, the calculated injection start angle“an3” is set to the comparison matching register 103. FIG. 13B shows theformer case.

Both the processes (1) and (2) realize the protection to keep theoptimum signal output start timing so that the down counter 107 does notoutput the secondary injection pulse signal until the elapse of theregular time length “TL” counted from the change of the primaryinjection pulse signal to Low level.

There is another conventional technique to determine the timing of afuel injection start or the timing of a fuel injection completion byusing a timer means and to perform the completion of the fuel injectionor the start of the fuel injection in synchronization with the operationof an engine of a vehicle. For example, the Japanese patent laid openpublication JP H4-136451 has disclosed such a technique.

By the way, those prior art techniques as explained above with referenceto FIGS. 13A and 13B, involve following drawbacks:

(a) Increasing the processing load of CPU; and

(b) Possibility not to keep the limitation regarding the regular timelength “TL” when the number of rotation of the crankshaft is increasedeven if the injection start angle “an2” is set to the comparisonmatching register 103 when the CPU judges the secondary injection startangle “an2” is later than the calculated crank angle “an3” as theexecution result of the above (2). That is, the actual crank anglebecomes equal to the injection start angle “an2” and the secondaryinjection pulse signal is thereby switched to High level before theelapse of the regular time length “TL” counted from the change to Lowlevel of the injection pulse signal for the primary fuel injection whenincreasing the rotation speed of the crankshaft.

In order to avoid such a drawback, there is another conventionaltechnique to set to the comparison matching register 103 a timeequivalent value obtained by converting the injection start angle, wherea timing counter performing counting every a constant time length iscompared with the comparison matching register 103, not with the anglecounter 101. That is, this technique controls the output start timing(the timing to change High level) to output the injection start anglebased on time, not based on the timing of the crank angle obtained bythe angle counter 101.

However, such a conventional technique cannot set the output starttiming to output the injection pulse signal based on the crank anglealthough it can keep the timing limitation of the regular time length“TL”. As a result, such a technique causes a mismatching between theoutput start timing to output the injection pulse signal and a targetinjection start angle. This technique deteriorates the accuracy of thefuel injection control greatly and is therefore not realistic manner.

SUMMARY OF THE INVENTION

It is an object of the present invention to provide a signal output unitand an electronic control unit equipped with the signal output unitcapable of keeping a timing limitation certainly with reduced load of aCPU, in which the level of an output signal is not switched until theelapse of a regular time length, namely, is switched only after theelapse of the regular time length, even if the rotation angle of arotary body such as a crankshaft reaches a target angle to allow theinverse of the level of the output signal.

To achieve the above purposes, the present invention provides a signaloutput unit having angle counter, a first register, a first comparator,a time counter, a second register, and a second comparator. The anglecounter is configured to perform a count operation in synchronizationwith a rotation of a rotary body and to output an angle count valueindicating a rotation angle of the rotary body. The first register inwhich a first comparison value is set is compared with the angle countvalue. The first comparator is configured to compare the angle countvalue with the first comparison value, and to output a first comparisonmatching signal when the angle counter value reaches the firstcomparison value. The time counter is configured to perform a countingoperation every a regular interval and to output a time count value. Thesecond register in which a second comparison value is set is comparedwith the time count value. The second comparator is configured tocompare the time count value with the second comparison value, and tooutput a second comparison matching signal when the time count valuereaches the second comparison value. The signal output unit isconfigured to invert a specified level of its output signal, and tooutput the output signal of the inverted level outside when the firstcomparator outputs the first comparison matching signal and the secondcomparator outputs the second comparison matching signal. The signaloutput unit realizes a time limitation function in which the signaloutput unit keeps the level of the output signal until a specifiedregular time length counted from a predetermined reference timing iselapsed even if the rotation angle of the rotary body reaches a targetangle at which the level of the output signal should be switched fromthe specified level. In order to perform such a time limitationfunction, the signal output unit sets to the first register the valuecorresponding to the target angle at which the level of the outputsignal should be switched. Further, the signal output unit sets to thesecond register an addition value obtained by adding the count value ofthe regular time length to the value of the time counter at thepredetermined reference timing (that is, a predicted value of the timecounter when the regular time length is elapsed from the predeterminedreference timing).

On performing the above setting to the first and second registers, thefirst comparator outputs the first comparison matching signal when therotation angle of the rotary body reaches the target angle, and thesecond comparator outputs the second comparison matching signal when theregular time length is elapsed from the predetermined reference timing.When the rotation angle of the rotary body reaches the target angleafter the regular time length counted from the predetermined referencetiming is elapsed, the level of the output signal is switched when therotation angle of the rotary body reaches the target angle (namely, thefirst comparator outputs the first comparison matching signal). On thecontrary, when the rotation angle of the rotary body reaches the targetangle before the regular time length counted from the predeterminedreference timing is elapsed, the level of the output signal is switchedfrom the specified level when the regular time length is elapsed fromthe predetermined reference timing (namely, the second comparatoroutputs the first comparison matching signal).

According to the signal output unit of the present invention, it ispossible to realize such a time limitation function with reducedprocessing load of a CPU and improved accuracy without fluctuation ofthe rotation speed of the rotary body.

According to the signal output unit as another aspect of the presentinvention, the predetermined specified level of the output signal of thesignal output unit is a level (as non-active level) indicating aninterruption of an electric power supply to a control target to becontrolled according to the output signal, and the inverted level (asactive level) of the output signal indicates the initiation of theelectric power to the control target. The target angle at which thelevel of the output signal is switched is the angle at which thenon-active level of the output signal is switched to the active level.In other words, such a target angle is the angle to initiate the outputof the output signal.

Thus, according to the signal output unit of the present invention, itis possible to realize, namely, to satisfy the time limitation function(in other words, its means a protection function for controlling theinitiation of the signal output) with reduced load of the CPU, by whichthe signal output unit halts the supply of the output signal until theregular time length counted from the predetermined reference timing iselapsed.

Further, according to the signal output unit as another aspect of thepresent invention, the specified level of the output signal from thesignal output unit is a level (as active level) indicating theinitiation of electric power supply to the control target to becontrolled according to the output signal, and the inverted level of theoutput signal is a level (as non-active level) indicating theinterruption of the electric power supply to the control target. Thetarget angle at which the level of the output signal is switched is theangle when the active level of the output signal is switched to thenon-active level. In other words, such a target angle is a completionangle to terminate the output of the output signal.

Thus, according to the signal output unit of the present invention, itis possible to realize, namely, to satisfy the time limitation function(in other words, its means a protection function for controlling thetermination of the signal output) with reduced load of the CPU, by whichthe signal output unit continuously supplies the output signal until theregular time length counted from the predetermined reference timing iselapsed.

It is possible to form an electronic control unit equipped with such asignal output unit described above capable of realizing the timelimitation function. According to the present invention, the electroniccontrol unit has the above signal output unit and a controller having aregister value setting means. The register value setting means stores tothe first register the target angle of the rotary body as anoutput-inversion angle at which the level of the output signal from thesignal output unit is inverted from the predetermined level to itsinversion level. The register value setting means adds a count value fora regular time period counted by the time counter to a count value ofthe time counter at a reference timing at a specified time, and storesthe addition result to the second register.

According to another aspect of the present invention, the signal outputunit further has a capture register configured to capture the time countvalue output from the time counter when the first comparator outputs thefirst comparison match signal.

It is thereby possible to easily obtain through the capture register theaccurate value of the time counter at the reference timing when therotation angle of the rotary body becomes a specified timing before thetarget angle as the output-inversion angle. It is thereby possible tostore the accurate value to the second register.

If the output signal unit is not equipped with any capture register, itis necessary to read immediately the value of the time counter onreaching the reference timing in order to read the value of the timecounter at the reference timing. However, it is difficult to obtain theaccurate value at the reference timing because of an execution delay inthe readout operation.

According to the signal output register incorporating the captureregister, when the predetermined angle is stored into the first registerbefore the reference timing occurs, the value of the time counter at thereference timing is captured into the capture register when the firstcomparator outputs the first comparison match signal on reaching therotation angle of the rotary body to the specified angle before thetarget angle as the output-inversion angle. It is thereby possible toobtain the accuracy value at the reference timing only by reading thevalue stored in the capture register.

According to the electronic control unit equipped with the signal outputunit having such a capture register, the reference timing is the timingwhen the rotation angle of the rotary body reaches the specified anglebefore the target angle as the output-inversion angle.

Further, the register value set means sets the specified angle into thefirst register before the reference angle occurs, and reads the valuestored in the capture register during the time length from the referencetiming to the timing at which the rotation angle of the rotation bodyreaches the target angle as the output-inversion angle. The registervalue set means sets to the second register the addition result ofadding the count value of the time counter during the regular timelength to the readout value from the capture register.

Accordingly, it is possible for the electronic control unit to obtainthe accurate value of the time counter at the reference timing throughthe capture register, and to perform the process satisfying the accuratetime limitation function by setting to the second register theprediction value of the time counter when the regular time lengthcounted from the reference timing is elapsed is set.

BRIEF DESCRIPTION OF THE DRAWINGS

A preferred, non-limiting embodiment of the present invention will bedescribed by way of example with reference to the accompanying drawings,in which:

FIG. 1 is a block diagram showing a configuration of an engine controlunit (ECU) as an electronic control unit according to a first embodimentof the present invention;

FIG. 2 is a block diagram showing a configuration of a timer module as asignal output unit incorporated in a CPU in the ECU shown in FIG. 1according to the first embodiment;

FIG. 3A shows a setting table that indicate the operation of a switchcircuit incorporated in the timer module shown in FIG. 2;

FIG. 3B is a block diagram showing a configuration of the switch circuitincorporated in the timer module shown in FIG. 2;

FIG. 4 is a block diagram showing a configuration of a down counterincorporated in the timer module shown in FIG. 2;

FIG. 5A is a flow chart showing a primary injection pulse settingprocess of outputting a primary injection pulse signal performed by theCPU according to the first embodiment;

FIG. 5B is a flow chart showing a process during an injection pulse-offtiming in which the CPU outputs a secondary injection pulse signalaccording to the first embodiment;

FIG. 6 is a timing chart showing the primary pulse setting process shownin FIG. 5A;

FIG. 7 is a timing chart showing the primary pulse setting process shownin FIG. 5A;

FIG. 8A is a flow chart showing an ignition pulse ON setting process ofswitching Low level of an ignition pulse signal to High level by the CPUaccording to the first embodiment;

FIG. 8B is a flow chart showing a process under pulse ON conditionperformed by the CPU when the ignition pulse signal is switched fromHigh level to Low level according to the first embodiment;

FIG. 9 is a timing chart showing the ignition pulse ON setting processshown in FIG. 8A and FIG. 8B;

FIG. 10 is a block diagram showing another configuration of the timermodule as a signal output unit incorporated in the CPU in the ECUaccording to a second embodiment of the present invention;

FIG. 11A is a flow chart showing a primary injection pulse settingprocess of outputting a primary injection pulse signal performed by theCPU according to a second embodiment;

FIG. 11B is a flow chart showing a process during an injection pulse OFFtiming in which the CPU outputs a secondary injection pulse signalaccording to the second embodiment;

FIG. 12A is a flow chart showing an ignition pulse ON setting process ofswitching Low level of an ignition pulse signal to High level by the CPUaccording to the second embodiment;

FIG. 12B is a flow chart showing the process under ignition pulse ONcondition performed by the CPU when the ignition pulse signal isswitched from High level to Low level according to the secondembodiment;

FIG. 13A shows a configuration of a block diagram of a circuit to outputan injection pulse signal; and

FIG. 13B is a timing chart showing the injection pulse signal in thecircuit shown in FIG. 13A.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

Hereinafter, various embodiments of the present invention will bedescribed with reference to the accompanying drawings. In the followingdescription of the various embodiments, like reference characters ornumerals designate like or equivalent component parts throughout theseveral diagrams.

A description will be given of a configuration of an electronic controlunit according to embodiments to which the concept of the presentinvention is applied. The electronic control unit according to thepresent invention corresponds to an engine control unit (hereinafter,referred to as “ECU”) through the following description of the first andsecond embodiments.

First Embodiment

FIG. 1 is a block diagram showing a configuration of the ECU 11according to the first embodiment of the present invention.

As shown in FIG. 1, the ECU 11 is equipped with a microcomputer 13 andan external input/output (I/O) circuit 15. The microcomputer 13 performsvarious processes for controlling the operation of an engine 1 in avehicle. The external I/O circuit 15 performs the input and outputoperation of various signals between the ECU 11 and the microcomputer13.

The vehicle is equipped with various types of actuators to operate theengine 1 and various types of sensors to detect the operation state ofthe engine 1 such as an injector 2 (as an electromagnetic type fuelinjection valve), an igniter 3 (as an ignition unit), an electronicthrottle 4, a crank sensor 5, a water temperature sensor 6, a throttlesensor 7, and so on. The injector 2 injects a fuel into engine cylindersof the engine 1. The igniter 3 ignites spark plugs in the engine 1. Theelectronic throttle 4 regulates the amount of inlet air into the engine1. The crank sensor 5 outputs a crank signal having an edge every aregular angle (for example, every 30° CA, where “CA” indicates crankangle) according to rotation of the crankshaft of the engine 1. Thewater temperature sensor 6 detects the temperature of cooling water forthe engine 1. The throttle sensor 7 detects an opening angle of theelectronic throttle 4.

The microcomputer 13 inputs various signals such as a crank signal fromthe crank sensor 5, each signal is switched between Low level and Highlevel after the external I/O circuit 15 rectifies those signals.

The microcomputer 13 inputs analogue signals such as the watertemperature sensor 6 and the signal from the throttle sensor 7 afterconversion of those analogue signals to digital signals by an A/Dconverter (not shown).

The microcomputer 13 instructs the external I/O circuit 15 to outputdriving currents to those various types of the actuators. In particular,the injector 2 opens its valve when receiving the injection pulse signalof High level output from the microcomputer 13. An electric currentflows into the igniter 3 during the microcomputer 13 outputs theignition pulse signal of High level, and the igniter 3 outputs anignition pulse signal to spark plugs when the microcomputer 13 outputsthe ignition pulse signal of Low level switched from High level and thecurrent flowing through the igniter 3 thereby interrupts.

By the way, the microcomputer 13 is equipped with a timer module 29 foroutputting the injection pulse signal and the ignition pulse signal inaddition to well known units such as a central processing unit (CPU) 21as a controller, a read only memory (ROM) 23, a random access memory(RAM) 25, and input/output ports 28.

A description will now be given of the timer module 29 as the signaloutput unit.

FIG. 2 is a block diagram showing a configuration of the timer module 29incorporated in the CPU 21 mounted on the ECU 11 shown in FIG. 1according to the first embodiment. As shown in FIG. 2, the timer module29 has an angle counter 31, an angle comparison matching register 32, acomparator 33, a time counter 34, a time comparison matching register35, a comparator 36 a down counter 37, and a switch circuit 38. Theangle counter 31 operates in synchronization with the rotation of thecrankshaft and outputs a counted value indicating a crank angle (that isa rotation angle of the crankshaft per one cycle of the engine 1). Theangle comparison matching register 32 stores a value to be compared withthe crank angle as the output value of the angle counter 31. Thecomparator 33 compares the output from the angle counter 31 with thevalue stored in the angle comparison matching register 32, and outputsan angle comparison matching signal to the switch circuit 38 when theoutput from the angle counter 31 reaches the value stored in the anglecomparison matching register 32. The time counter 34 counts up every aconstant time. The time comparison matching register 35 stores a valueto be compared with the value stored in the timer counter 34. Thecomparator 36 compares the value stored in the time counter with thevalue stored in the time comparison matching register 35, and outputs atime comparison matching signal to the switch circuit 38 when the valuestored in the time counter reaches the value stored in the timecomparison matching register 35. The down counter 37 outputs aninjection pulse signal or an ignition pulse signal. The switch circuit38 receives the angle comparison matching signal transferred from thecomparator 33 and the time comparison matching signal transferred fromthe comparator 36, and generates both or one of a pulse ON triggersignal and a pulse OFF trigger signal during a mode set by the CPU 21,and outputs the generated signals to the down counter 37.

The pulse ON trigger signal transferred from the switch circuit 38 actsfor changing the output level of the down counter 37 to an active level(H level through the embodiment), and the pulse OFF trigger signaltransferred from the switch circuit 38 acts for changing the outputlevel of the down counter 37 to an inactive level (L level through thefirst embodiment). Through the first embodiment, the above signals, theangle comparison matching signal, the time comparison matching signal,the pulse ON trigger signal, the pulse OFF trigger signal take H levelas the active level.

The CPU 31 sets an optional value indicating an optional time length asdata into the down counter 37 in advance. When receiving the pulse ONtrigger signal transferred from the switch circuit 38, the down counter37 switches Low level of its output signal to H level and initiates downcounting operation from the pre-set value. When the counted valuereaches zero, or when receiving the pulse OFF trigger signal transferredfrom the switch circuit 38, the down counter 37 switches H level of itsoutput signal to L level. The configuration of the down counter 37 willbe described in detail later.

On the contrary, the angle counter 31 is a counter that performs thecounting operation with a smaller resolution than the angle by which aneffective edge is generated in the crank signal. The counted value ofthe angle counter 31 indicates the crank angle with this angleresolution. That is, the microcomputer 13 has a count controller (notshown) configured to control the counting operation of the angle counter31. The count controller (not shown) generates a multiplication clocksignal (, more specifically, a period of which is obtained by dividing aperiod of the crank signal by a multiplication number) based on a cranksignal. The angle counter 31 performs the counting operation repeatedlybased on the multiplication clock signals.

The configuration and operation of such a count controller are wellknown, the explanation for them is omitted here.

The time counter 34 is a free run counter to count up every receiving aninternal clock.

The comparator 33 has a latch circuit (not shown) which continuouslyoutputs the angle comparison matching signal until the CPU 21 resets thelatch circuit after the output of the angle comparison matching signalfrom the comparator 33. The comparator 36 has such a function.

Next, a description will now be given of the configuration and operationof the switch circuit 38 with reference to FIG. 3A and FIG. 3B.

FIG. 3A shows a setting table indicating the operation of the switchcircuit 38 incorporated in the timer module 29 shown in FIG. 2.

The set value in the setting table shown in FIG. 3A is a set value(hereinafter, referred to as “mode set value”) of the operation mode setby the CPU 21. FIG. 3B is a block diagram showing a configuration of theswitch circuit 38 incorporated in the timer module 29 shown in FIG. 2.

As shown in FIG. 3A, the switch circuit 38 is set into an operation modewhen receiving the mode set value transferred from the CPU 21. Theoperation mode is one of the values of 0 to 5. The switch circuit 38generates both or one of the pulse ON trigger signal and the pulse OFFtrigger signal based on the received angle comparison matching signaland the time comparison matching signal under the condition of the setoperation mode.

That is, when the mode set value is 1, the switch circuit 38 does notoutput the pulse ON trigger signal, and outputs the time comparisonmatching signal from the comparator 36 as the pulse OFF trigger signal.

Further, when the mode set value is 2, the switch circuit 38 does notoutput the pulse OFF trigger signal, and outputs the angle comparisonmatching signal from the comparator 33 as the pulse ON trigger signal.

Still further, when the mode set value is 3, the switch circuit 38outputs the angle comparison matching signal as the pulse ON triggersignal, and outputs the time comparison matching signal as the pulse OFFtrigger signal.

Moreover, when the mode set value is 4, the switch circuit 38 does notoutput the pulse OFF trigger signal, and performs a logical ANDoperation between the angle comparison matching signal and the timecomparison matching signal, and then outputs the logical operationresult as the pulse ON trigger signal.

Still further, when the mode set value is 5, the switch circuit 38 doesnot output the pulse ON trigger signal, and performs a logical ANDoperation between the angle comparison matching signal and the timecomparison matching signal, and then outputs the logical operationresult as the pulse OFF trigger signal.

Finally, when the mode set value is 0, the switch circuit 38 does notoutput both the pulse ON trigger signal and the pulse OFF triggersignal.

In order to realize such a function described above, the switch circuit38 has a register 41, an AND circuit 42, OR circuits 43 and 44, switchcircuits 45 to 48, and a decode circuit 49. The CPU 21 writes the modeset value to the register 41. The AND circuit performs the logical ANDoperation between the angle comparison matching signal and the timecomparison matching signal and outputs the operation result as thelogical AND signal. The OR circuit 43 outputs the pulse ON triggersignal. The OR circuit 44 outputs the pulse OFF trigger signal. When theswitch circuit 45 is turned ON, the angle comparison matching signal isprovided to one input terminal of the OR circuit 43. When the switchcircuit 46 is turned ON, the output of the AND circuit 42 is provided toanother input terminal of the OR circuit 43. When the switch circuit 47is turned ON, the time comparison matching signal is provided to oneinput terminal of the OR circuit 44. When the switch circuit 48 isturned ON, the output of the AND circuit 42 is provided to another inputterminal of the OR circuit 44. The decode circuit 49 controls ON/OFFoperation of those switch circuits 45 to 48 according to the mode setvalue stored in the register 41.

When the mode set value is 0, the decode circuit 49 controls so that allof the switch circuits 45 to 48 are turned OFF.

When the mode set value is 1, the decode circuit 49 controls so thatonly the switch circuit 47 is turned ON.

When the mode set value is 2, the decode circuit 49 controls so thatonly the switch circuit 45 is turned ON.

When the mode set value is 3, the decode circuit 49 controls so thatonly the switch circuits 45 and 47 are turned ON.

When the mode set value is 4, the decode circuit 49 controls so thatonly the switch circuit 46 is turned ON.

When the mode set value is 5, the decode circuit 49 controls so thatonly the switch circuit 48 is turned ON.

Both the input terminal of the OR circuits 43 and 44 are pull downed,namely, grounded through resistances (not shown). Because the inputterminals of the OR circuits 43 and 44 are connected to the switchcircuits 45 to 48, when all of the switch circuits 45 to 48 are turnedOFF, each input terminal of the OR circuits 43 and 44 inputs the signalof Low level.

FIG. 4 is a block diagram showing a configuration of the down counter 37incorporated in the timer module 29 shown in FIG. 2.

As shown in FIG. 4, the down counter 37 has OR circuits 51 and 52, alatch circuit 53, AND circuits 54 and 56, and a counter 55.

The OR circuit 51 inputs the pulse ON trigger signal transferred fromthe switch circuit 38 and the set signal transferred from the CPU 21.The OR circuit 52 inputs the pulse OFF trigger signal transferred fromthe switch circuit 38 and the reset signal transferred from the CPU 21.The latch circuit 53 has a high-active set terminal to which the outputsignal from the OR circuit 51 is supplied and a high-active resetterminal to which the output signal from the OR circuit 52 is supplied.The AND circuit 54 inputs the output from the latch circuit 53 and theinternal clock in the microcomputer 13. The CPU 21 can set an optionaldata item indicating an optional time length to the counter 55 inadvance. The counter 55 performs the counting down operation based onthe clock signal provided from the AND counter 54 and outputs a Highlevel signal until the counted values reaches zero. The AND circuit 56performs logical AND between the output from the counter 55 and theoutput of the latch circuit 53, and outputs the operation result as theoutput of the down counter 37.

When the output signal of the OR circuit 52 becomes High level, thecounted value of the counter 55 is reset to zero.

In the down counter 37 having such a configuration, when the downcounter 37 receives the pulse ON trigger signal of High leveltransferred from the switch circuit 38 under the condition where thevalue indicating an optional time length is set in advance to thecounter 55, the latch circuit 53 becomes active and thereby outputs thesignal of High level, and the AND circuit 56 thereby outputs the outputsignal of High level. At a same time, the counter 55 initiates the downcounting when receiving the clock signal from the AND circuit 54.

When the count value of the counter 55 reaches zero, or when the switchcircuit 38 outputs the pulse OFF trigger signal of High level and the ORcircuits 52 resets the latch circuit 43 and the counter 55, the ANDcircuit 56 outputs the output signal of Low level.

The latch circuit 53 is forcedly set to the set state by transferringthe set signal from the CPU 21 to the OR circuit 51.

Both the latch circuit 53 and the counter 55 are forcedly reset ontransferring the reset signal from the CPU 21 to the OR circuit 52.

A description will now be given of the process to output the injectionpulse signal using the timer module 29 with reference to FIGS. 5A and5B, FIG. 6, and FIG. 7. In the following case, the down counter 37outputs the output signal as the injection pulse signal.

FIG. 5A is a flow chart showing a primary injection pulse settingprocess of outputting a primary injection pulse signal performed by theCPU 21 according to the first embodiment. FIG. 5B is a flow chartshowing a process during an injection pulse OFF timing in which the CPU21 outputs a secondary injection pulse signal according to the firstembodiment. FIG. 6 is a timing chart showing the primary pulse settingprocess shown in FIG. 5A. FIG. 7 is a timing chart showing the primarypulse setting process shown in FIG. 5A.

The ECU 11 according to the first embodiment performs a split injectionin which the fuel injection to each cylinder of the engine is dividedinto plural injections. In order to realize the split injection, theinjection pulse signal has High level during a primary injection timeperiod “Tf1” counted from the primary injection start angle “an1” of thecrank angle of the crankshaft. After this, the injection pulse signalhas High level during a secondary injection time period “Tf2” countedfrom the secondary injection start angle “an2” of the crank angle of thecrankshaft. Further, the split injection process must have the timelimitation to keep the time interval between the primary injection pulsesignal and the secondary injection pulse signal. That is, even if thecrank angle of the crankshaft takes the secondary injection start angle“an2”, the output of the injection pulse signal of Low level must bekept until the regular time length TL has been elapsed counted from thecompletion time of the primary fuel injection process (, namely, fromthe timing at which the primary injection pulse signal is switched toLow level, see FIG. 6).

The CPU 21 performs another control process (not shown) of detecting theoperation state of the engine 1 based on detection signals transferredfrom sensors of various types, and the CPU 21 calculates the primary andsecondary injection start angles “an1” and “an2”, and the fuel injectiontimings “Tf1” and “Tf2” based on the detection results of those sensorsof various types.

FIG. 5A shows the flow chart of the primary pulse setting process to beexecuted by the CPU 21 in order to output the primary injection pulsesignal.

The primary pulse setting process is performed at an optional timingbefore the crank angle of the crankshaft reaches the primary injectionstart angle “an1”. Before the initiation of the primary pulse settingprocess, the CPU 21 resets the latch circuits in the comparators 33 and36 (which output the angle comparison matching signal and the timecomparison matching signal), and the latch circuit 53 in the downcounter 37.

As shown in FIG. 5A, when the CPU 21 initiates the primary pulse settingprocess, the primary injection start angle “an1” is set into the anglecomparison matching register 32 (step S110). Following, the valuecorresponding to the primary fuel injection time length “Tf1” is setinto the down counter 37 (more specifically, into the counter 55 formingthe down counter 37) in step S120. The value corresponding to the fuelinjection time length “Tf1” is obtained by dividing the fuel injectiontime length “Tf1” by one period of the clock in the down counter 37.

At step S130, the value 2 is written into the register 41 of the switchcircuit 38. After this, the primary pulse setting process is completed.

As shown in FIG. 6, when the value of the angle counter 31 reaches theprimary injection start angle “an1” and the comparator 33 outputs theangle comparison matching signal (namely, when the angle comparisonmatching signal becomes High level), the switch circuit 38 outputs thepulse ON trigger signal of High level, and the down counter 37 outputsthe injection pulse signal of High level. At the same time, the downcounter 37 initiates the counting down of the counter 55 therein. Afterthis, when the count value of the counter 55 reaches zero after theprimary fuel injection time length “Tf1” is elapsed. The down counter 37outputs the injection pulse signal of Low level. The primary injectionpulse signal is switched by using the above manner.

FIG. 5B shows the pulse OFF process of outputting the secondaryinjection pulse signal from the CPU 21. The pulse OFF process isperformed when the injection pulse signal is switched from High level toLow level.

As shown in FIG. 5B, when starting the pulse OFF process, the CPU 21reads the value stored in the time counter 34 (at step S205) and storestherein as the timing “t1” (hereinafter, referred to as “pulse OFFtiming”) at which the injection pulse signal is switched from High levelto Low level.

At step S210, the latch circuits in the comparators 33 and 36 are resetin order to clear the angle comparison matching signal and the timecomparison matching signal for the primary fuel injection process.Further, the latch circuit 53 in the down counter 37 is reset when thedown counter 37 receives the reset signal.

At step S220, it is judged whether or not it is necessary to output thefollowing injection pulse signal. When the judgment result indicates notnecessity to output the following injection pulse signal (, namely, whenthe fuel pulse signal switched to Low level is the secondary injectionpulse signal), the pulse OFF process is completed.

In step S220, when the judgment result indicates the necessity to outputthe following injection pulse signal (namely, when the fuel pulse signalswitched to Low level is the primary injection pulse signal), theoperation process goes to step S230 in which the secondary injectionstart angle “an2” is set to the angle comparison matching register 32.

At step S240, the CPU 21 adds the pulse OFF time “t1” stored therein atstep S205 and the counted value corresponding to the regular time length“TL” to be stored in the time counter 34 (, more specifically, which isthe value obtained by dividing the regular time length “TL” by the timeof one cycle of the clock signal used in the time counter 34), andoutputs the calculated value as the time “t2” that is the elapsed timeof the regular time length “TL” counted from the pulse OFF time “t1”.That is, the predicted value is calculated as the time “t2”. Thepredicted value is the value stored in the time counter 34 when theregular time length “TL” has been elapsed from the pulse OFF time “t1”.

Next, at step S250, the time “t2” calculated in step S240 is set intothe time comparison matching register 35. At step S260, the valuecorresponding to the secondary fuel injection time “Tf2” is set to thedown counter 37 (, more specifically, set to the counter forming thedown counter 37).

The value corresponding to the fuel injection time “Tf2” is the valueobtained by dividing the fuel injection time “Tf2” by one period of theclock signal used in the down counter 37.

At step S270, the value “4” is written into the register 41 in theswitch circuit 38, and the pulse OFF process is thereby completed.

In the pulse OFF process described above, if the crank angle reaches thesecondary injection start angle “an2” after the regular time length “TL”is elapsed from the pulse OFF time “t1” of the primary injection pulsesignal, as shown in FIG. 6, the comparator 36 outputs the timecomparison matching signal of High level because the value of the timecounter 34 reaches the time “t2” set in the time comparison matchingregister 35 before the value stored in the angle counter 31 reaches thesecondary injection start angle “an2” set in the angle comparisonmatching register 32. In this state, because the mode set value set inthe switch circuit 38 is 4, the switch circuit 38 outputs the pulse ONtrigger signal of High level and the down counter 37 outputs thesecondary injection pulse signal of High level from Low level when thevalue in the angle counter 31 reaches the secondary injection startangle “an2” and when the comparator 33 outputs the angle comparisonmatching signal of High level. At the same time, the counter 55 in thedown counter 35 initiates the counting down process, and after this, thedown counter 37 outputs the secondary injection pulse signal of Lowlevel from High level when the secondary fuel injection time “Tf2” iselapsed and the count value of the counter 55 reaches zero.

On the other hand, if the rotation speed of the crankshaft increases,and when the crank angle thereby reaches the secondary injection startangle “an2” before the regular time length “TL” counted from the pulseOFF time “t1” of the primary injection pulse signal is elapsed, as shownin FIG. 7, the comparator 33 outputs the angle comparison matchingsignal of High level because the value in the angle counter 31 reachesthe secondary injection start angle “an2” set in the angle comparisonmatching register 32 before the value in the time counter 34 reaches thetime “t2” set in the time comparison matching register 35.

After this, because the mode set value set in the switch circuit 38 is4, the switch circuit 38 outputs the pulse ON trigger signal of Highlevel and the down counter 37 outputs the secondary injection pulsesignal of High level from Low level when the value in the time counter34 reaches the time “t2” set in the time comparison matching register 35and when the comparator 36 outputs the time comparison matching signalof High level (that is, at the elapsed time of the regular time length“TL” counted from the pulse OFF time “t1” from Low level).

At the same time, the counter 55 in the down counter 37 initiates thecounting down process. After this, the down counter 37 outputs thesecondary injection pulse signal of Low level from High level when thecount value in the counter 55 reaches zero after the secondary fuelinjection time “Tf2” is elapsed.

Thus, when the mode set value of 4 is set to the switch circuit 38 inthe timer module 29 in the ECU 11, the down counter 37 outputs theoutput signal of High level as active level switched from Low level asnon-active level at the timing in which the comparator 33 outputs theangle comparison matching signal and the comparator 36 outputs the timecomparison matching signal.

It is thereby possible to certainly satisfy the time limitation functionregarding the injection pulse signal under the split injection processwithout any influence of rotation of the crankshaft by setting thevalues to the angle comparison matching register 32 and the timecomparison matching register 35 in steps S230 to S250 shown in FIG. 5B,where the time limitation function is following conditions (a1) and(a2):

(a1) The time interval between the primary injection pulse signal andthe secondary injection pulse signal takes more than the regular timelength “TL” under the time limitation regarding the injection pulsesignal in the split injection process; and

(a2) A following pulse signal is not switched to High level until theregular time length “TL” counted from the completion time of the primaryfuel injection has been elapsed even if the crank angle reaches thesecondary injection start angle “an2”.

A description will now be given of the process to output the ignitionpulse signal using the timer module 29 with reference to the flow chartsshown in FIG. 8A and FIG. 8B and the timing chart shown in FIG. 9. Inthis case, the down counter 37 outputs the output signal as the ignitionpulse signal.

At first, as precondition, the CPU 21 detects the operation state of theengine 1 of the vehicle based on the signals transferred from thevarious sensors in another control process (not shown), and calculatesboth the pulse OFF angle “an21” and the pulse ON time “Ton” as controlparameters for the ignition pulse signal based on the detection result.The CPU 21 further calculates the pulse ON angle “an11” based on boththe control parameters “an12” and “Ton”.

As shown in FIG. 9, the pulse OFF angle “an12” is a crank angle at whichthe ignition pulse signal of High level is switched to Low level. Inother words, it is the crank angle at which the power supply to theigniter 3 is terminated. The pulse ON time “Ton” is the time period tokeep the ignition pulse signal of H level. In other words, it is thetime period to continuously supply the electric power to the igniter 3.The pulse ON angle “an11” is the crank angle at which the ignition pulsesignal of Low level is switched to High level. In other words, it is thecrank angle to initiate the power supply to the igniter 3.

The pulse ON angle “an11” is calculated based on the pulse OFF angle“an12”, the pulse ON time “Ton”, and the rotation speed of thecrankshaft detected at this timing.

In a concrete example, the CPU 21 calculates the rotation angle “CAon”of the crankshaft during the pulse ON time “Ton” based on the rotationspeed of the crankshaft, and calculates the pulse ON angle “an11” bysubtracting the calculated angle “CAon” from the pulse OFF angle “an12”.

That is, because it is important to know the timing of when to switch toa High level of ignition pulse signal to Low level, the pulse ON angle“an11” is calculated based on the pulse OFF angle “an12” which is usedto determine this OFF timing.

In a case where the rotation speed of the crankshaft increases after theignition pulse signal of Low level is switched to High level after thecrank angle reaches the pulse ON angle “an11”, because the actual timefrom the pulse ON angle “an11” to the pulse OFF angle “an12” (that is,the time at which the ignition pulse signal is actually switched to Highlevel) is shorter than the calculated pulse ON time “Ton”, there is apossibility not to ignite sparking plugs.

In order to avoid this phenomenon, during the ignition control for theengine 1, the ignition pulse signal of High level is kept (in otherwords, the output of the ignition pulse signal is not terminated) untilthe regular time length “TH” counted from the timing of the pulse ONangle “an11” (that is, from the timing at which the ignition pulsesignal is switched to High level) has been elapsed.

FIG. 8A is a flow chart showing the pulse ON setting process in whichthe CPU 21 switches Low level of the ignition pulse signal to Highlevel. The pulse ON setting process is executed at an optional timingbefore the crank angle reaches the pulse ON angle “an11”. Before theexecution of the pulse ON setting process, the CPU 21 resets the latchcircuits (output the angle comparison matching signal and the timecomparison matching signal) incorporated in the comparators 33 and 36and the latch circuit incorporated in the down counter 53.

As shown in FIG. 8A, the CPU 21 initiates the pulse ON setting process,and sets the pulse ON angle “an11” to the angle comparison matchingregister 32 at step S310. The CPU 21 sets the available maximum countvalue to the down counter 37 (more specifically, to the counter 55forming the down counter 37.

The time from the maximum value to zero by the counter 55 is adequatelylonger than the pulse ON time “Ton” calculated by the CPU 21. The reasonfor setting the maximum value to the down counter 37 at step S320 isthat the output control for the ignition pulse signal to switch Highlevel thereof to Low level does not use the counting down function ofthe down counter 37.

Next, at step S330, CPU 21 sets the value of 2 as the mode set value tothe register 41 in the switch circuit 38, and the pulse ON settingprocess is then completed.

After the completion of the pulse ON setting process described above,when the angle counter 31 reaches the pulse ON angle “an11” and thecomparator 33 outputs the angle comparison matching signal (that is,switches Low level of the angle comparison matching signal to Highlevel), as shown in FIG. 9, the switch circuit 38 outputs the pulse ONtrigger signal of High level (that is switched from Low level) and thedown counter 37 outputs the ignition pulse signal of High level (that isswitched from Low level).

Next, as shown in FIG. 8B, when the CPU 21 initiates the process underpulse ON condition, the CPU 21 reads the current value stored in thetime counter 24 at step S405, and stores it as the time “t11” at whichthe ignition pulse signal is switched from Low level to High level(hereinafter, this timing is referred to as “pulse ON time”).

At step S410, the CPU 21 resets the latch circuits in the comparators 33and 36 in order to clear the angle comparison matching signal and thetime comparison matching signal.

Next, at step S420, the CPU 21 sets the pulse OFF angle “an12” to theangle comparison matching register 32.

Next, at step S430, the CPU 21 adds the count value during the regulartime length “TH” counted by the time counter 34 to the pulse ON time“t11” stored in step S405 therein, where the count value during theregular time length “TH” is the value obtained by dividing the regulartime length “TL” by the time period of one clock cycle used in the timecounter 34. The CPU 21 outputs the added value described above as thetime “t12” at which the regular time “TH” is elapsed counted from thepulse ON time “t11”. That is, the CPU 21 calculates the time “t12” as aprediction value to be stored in the time counter 34 which is theelapsed time of the regular time length “TH” counted from the pulse ONtime “t11”.

At step S440, the CPU 21 sets the calculated time “t12” at step S430 tothe time comparison matching register 35. At step S450, the CPU 21writes the mode set value of 5 to the register 41 in the switch circuit38. After those processes, the process under pulse ON condition iscompleted.

By performing such a process under the pulse ON condition shown in FIG.8B, when the crank angle reaches the pulse OFF angle “an12” after thetime “t12” as the elapsed time of the regular time length “TH” countedfrom the pulse ON time “t11”, as shown by solid lines in FIG. 9, thecomparator 36 outputs the time comparison matching signal of High levelbecause the value stored in the time counter 34 reaches the time “t12”stored in the time comparison matching register 35 before the valuestored in the angle counter 31 reaches the pulse OFF angle “an12” set inthe angle comparison matching register 32.

After this, because the mode set value of 5 is set into the switchcircuit 38, when the value in the angle counter 31 reaches the pulse OFFangle “an12” and when the angle comparison matching signal transferredfrom the comparator 33 becomes High level, the switch circuit 38 outputsthe pulse OFF trigger signal of High level, and the down counter 37outputs the ignition pulse signal of Low level.

On the contrary, when the rotation speed of the crankshaft increases,and when the crank angle reaches the pulse OFF angle “an12” before thetime “t12” that is the elapsed time of the regular time length “TH”counted from the pulse ON time “t11”, as shown by the alternate long andshort dashed lines in FIG. 9, the comparator 33 outputs the anglecomparison matching signal of High level because the value in the anglecounter 31 reaches the pulse OFF angle “an12” set in the anglecomparison matching register 32 before the value in the time counter 34reaches the time “t12” set in the time comparison matching register 35.

Because the mode set value of 5 is set into the switch circuit 38, theswitch circuit 38 outputs the pulse OFF trigger signal of Low level andthe down counter 37 outputs the ignition pulse signal of Low level thatis switched from High level when the value stored in the time counter 34reaches the time “t12” stored in the time comparison matching register35 and when the comparator 36 outputs the time comparison matchingsignal of High level (that is, when the regular time length “TH” countedfrom the pulse ON time “t11” has been elapsed).

As described above, when the mode set value of 5 is set into the switchcircuit 38 in the timer module 29 incorporated in the ECU 11, the downcounter 37 switches High level (as active level) of the ignition pulsesignal to Low level (as inactive level) when both the comparators 33 and36 output the comparison matching signals (the angle comparison matchingsignal and the time comparison matching signal).

Accordingly, it is possible to realize the following time limitationfunction without any influence of fluctuation of the rotation speed ofthe crankshaft of the engine 1 by setting the values into the anglecomparison matching register 32 and the time comparison matchingregister 35 performed in steps S420 to S440 in FIG. 8B.

The time limitation function: Not to switch High level of the ignitionpulse signal to Low level (namely, not to terminate the output of theignition pulse signal) until the regular time length “TH” counted fromthe pulse ON angle “an11” has been elapsed.

As described above, according to the ECU 11 of the first embodiment ofthe present invention, it is possible to satisfy the time limitationconditions for the injection pulse signal for the split injection andthe time limitation for the ignition pulse signal with reduced CPU loadand without influence of fluctuation of the rotation speed of thecrankshaft.

The relationship between the signal output unit of the first embodimentand the signal output unit defined in claims is as follows:

The timer module 29 corresponds to the signal output unit;

The angle comparison matching register 32 corresponds to the firstregister;

The comparator 33 corresponds to the first comparison circuit;

The time comparison matching register 36 corresponds to the secondcomparison circuit as defined in claims;

The processes in steps S230 to S250 shown in FIG. 5B or the processes instep S420 to S440 correspond to the processes performed by the registervalue setting process means as defined in claims, that is, in theprocesses for the injection pulse signal, the secondary injection startangle “an2” corresponds to the target angle, namely, theoutput-inversion angle, and the completion timing (at which the primaryinjection pulse signal is switched to Low level) of the primary fuelinjection corresponds to the reference timing at the specified timing;and

In the processes for the ignition pulse signal, the pulse OFF angle“an12” corresponds to the output-inversion angle, and the timing of thepulse ON angle “an11” (at which the ignition pulse signal is switched toHigh level) corresponds to the reference timing at the specified timingas defined in claims.

Further, the timer module 29 according to the first embodiment iscapable of switching its output signal from Low level to High level atthe timing when the CPU 21 transfers the set signal to the down counter37 or the switch circuit 38 transfers the pulse ON trigger signal to thedown counter 37 under the condition where the latch circuit 53 in thedown counter 37 (see FIG. 4) has been reset and the count value in thecounter 55 is not zero. After this, the timer module 29 can switch itsoutput signal from High level to Low level at the timing when the CPU 21transfers the reset signal to the down counter 37 or the switch circuit38 transfers the pulse OFF trigger signal to the down counter 37 beforethe counted value in the counter 55 reaches zero.

Accordingly, for example, when the mode set value of zero is set intothe switch circuit 38, the timer module 29 can switch its output signalfrom Low level to High level when the CPU 21 transfers the set signal tothe down counter 37, and further, the timer module 29 can switch itsoutput signal from High level to Low level when the CPU 21 transfers thereset signal to the down counter 37.

Still further, when the mode set value of 1 is set into the switchcircuit 38, the timer module 29 can switch its output signal from Lowlevel to High level when the CPU 21 transfers the set signal to the downcounter 37, and further, the timer module 29 can switch its outputsignal from High level to Low level when the comparator 36 transfers thetime comparison matching signal to the switch circuit 38.

Still further, when the mode set value of 2 is set into the switchcircuit 38, the timer module 29 can switch its output signal from Lowlevel to High level when the comparator 33 transfers the anglecomparison matching signal to the switch circuit 38, and further, thetimer module 29 can switch its output signal from High level to Lowlevel when the CPU 21 transfers the reset signal to the down counter 37.

Moreover, when the mode set value of 3 is set into the switch circuit38, the timer module 29 can switch its output signal from Low level toHigh level when the comparator 33 transfers the angle comparisonmatching signal to the switch circuit 38, and further, the timer module29 can switch its output signal from High level to Low level when thecomparator 36 transfers the time comparison matching signal to theswitch circuit 38.

Second Embodiment

Next, a description will now be given of the timer module as the signaloutput unit and the ECU as the electronic control unit according to thesecond embodiment of the present invention.

When compared with the configuration of the ECU according to the firstembodiment, the ECU of the second embodiment has the timer module 59shown in FIG. 10 instead of the timer module 29 of the first embodiment.

FIG. 10 is a block diagram showing a configuration of the timer module59 incorporated in the CPU in the ECU according to the second embodimentof the present invention.

When compared with the timer module 29 of the first embodiment, thetimer module 59 of the second embodiment has a capture and timecomparison matching register 61 instead of the time comparison matchingregister 35 incorporated in the timer module 29 of the first embodiment.

The capture and time comparison matching register 61 is a registercapable of performing two operation modes. In the first operation mode,similar to the function of the time comparison matching register 35 ofthe first embodiment, the capture and time comparison matching register61 acts as the time comparison matching register in the timer module 29of the first embodiment, the value stored therein is compared with thevalue stored in the time counter 34. In the second operation mode, thecapture and time comparison matching register 61 acts as a captureregister capable of capturing (that is, capable of retrieving and thenstoring therein) the value stored in the time counter 34 when thecomparator 33 outputs the angle comparison matching signal to theregister 61 and the switch circuit 38.

Further, when compared with the ECU 11 of the first embodiment, the CPU21 in the ECU of the second embodiment performs the process shown inFIG. 11A and FIG. 11B, instead of the process shown in FIG. 5A and FIG.5B of the first embodiment, and performs the process shown in FIG. 12Aand FIG. 12B instead of the process shown in FIG. 8A and FIG. 8B of thefirst embodiment.

A description will now be given of the operation shown in FIG. 11A andFIG. 11B, and FIG. 12A and FIG. 12B performed by the ECU of the secondembodiment.

Similar to the primary pulse setting process shown in FIG. 5A of thefirst embodiment, FIG. 11A is a flow chart showing a primary injectionpulse setting process of outputting a primary injection pulse signalperformed by the CPU 21 in the ECU of the second embodiment.

When compared with the primary pulse setting process shown in FIG. 5A,in the primary pulse setting process shown in FIG. 11A, step S140 isadded immediately following step S130. In step S140, the capture andtime comparison matching register 61 is set as a capture register.

Further, similar to the process shown in FIG. 5B of the firstembodiment, FIG. 11B is a flow chart showing a process in the pulse OFFcondition performed by the CPU 21 in order to output the secondaryinjection pulse signal.

The CPU 21 performs the process under the pulse OFF condition when thelevel of the injection pulse signal is switched from High level to Lowlevel.

When compared with the process under the pulse ON state shown in FIG.5B, in the process under the pulse OFF state shown in FIG. 11B, theprocess of step S205 shown in FIG. 5B is eliminated in the secondembodiment, and additional process of step S243 to 247 are performedinstead of the process of step S240 shown in FIG. 5B.

Firstly, the CPU 21 reads the value stored in the capture and timecomparison matching register 61. That is, at step S140 shown in FIG.11A, the capture and time comparison matching register 61 is set as acapture register and stores the value set in the time counter 34, whichis the value of the time counter 34 when the primary injection pulsesignal is switched from Low level to High level (namely, at the timewhen the crank angle reaches the primary injection start angle “an1”)after the comparator 33 outputs the angle comparison matching signal.The CPU 21 reads the value captured by the capture and time comparisonmatching register 61.

Next, in step S245, the CPU 21 adds the counted value stored in the timecounter 34 to the value which is read in step S243 (namely, which isstored in the capture and time comparison matching register 61). The CPU21 then outputs the added one as the time “t2” which is the elapsed timeof the regular time length “TL” counted from the pulse OFF time “t1”,where the counted value stored in the time counter 34 is a time obtainedby adding the primary fuel injection time “Tf1” and the regular timelength “TU”. That is, the CPU 21 in the timer module 59 in the ECUaccording to the second embodiment calculates a prediction value to beset in the timer counter 34 as the time “t2”. The prediction value is anelapsed time of “Tf1+TL” counted from the time at which the primaryinjection pulse signal is switched to High level.

Further, at step S247, the CPU 21 sets the capture and time comparisonmatching register 61 as the time comparison matching register. Theoperation flow then goes to step S250.

Like the process shown in FIG. 5B of the first embodiment, the CPU 21sets the time “t2” calculated in step S245 to the capture and timecomparison matching register 61 in step S250.

As described above, according to the second embodiment, the primaryinjection start angle “an1” is set to the angle comparison matchingregister 32 and the capture and time comparison matching register 61 isused as a capture register when the mode set value of 2 is set to theswitch circuit 38 in the primary pulse setting process shown in FIG.11A.

In the pulse OFF process shown in FIG. 11B, the CPU reads the datastored in the capture and time comparison matching register 61 as thecapture register, which indicates the time value stored in the timecounter 34 at which the primary injection pulse signal is switched fromLow level to High level, and the CPU 21 calculates the time “t2” to beset into the capture and time comparison matching register 61 as thetime comparison matching register.

It is thereby possible for the CPU 21 to easily obtain the preciousvalue stored in the time counter 34, which indicates the time at whichthe primary injection pulse signal is switched from Low level to Highlevel. Accordingly, it is possible to set the precious data as the time“t2” into the capture and time comparison matching register 61 whichacts as the time comparison matching register. Although the timer module29 of the first embodiment shown in FIG. 5B involves a possibility togenerate an error caused by a processing delay in step S205, the timermodule 59 of the second embodiment eliminates such a possibility.

The primary injection pulse signal “an1” used in the second embodimentcorresponds to the specified angle before the target angle as theoutput-inversion angle defined in claims. That is, the timing at whichthe primary injection pulse signal is switched to High level correspondsto the reference timing at a specified time.

The value “Tf1+TL” corresponds to the regular time period as defined inclaims. Further, the process of step S110 shown in FIG. 11A and theprocess of steps S230 to S250 shown in FIG. 11B correspond to theprocess performed by the register value setting means defined in claims.

Similar to the process of the first embodiment shown in FIG. 8A, FIG.12A is a flow chart showing the ignition pulse ON setting process ofswitching Low level of the ignition pulse signal to High level by theCPU 21 according to the second embodiment.

In the ignition pulse ON setting process shown in FIG. 12A, whencompared with the ignition pulse ON setting process shown in FIG. 8A,the process of step S340 is added after step S330. In the secondembodiment, it is so set that the capture and time comparison matchingregister 61 serves as a capture register.

Further, like the process of the first embodiment shown in FIG. 8B, FIG.12B is a flow chart showing the process under the ignition pulse ONcondition according to the second embodiment, where the ignition pulsesignal is switched from High level to Low level. The process under theignition pulse ON condition is performed when the ignition pulse signalis switched from Low level to High level.

In the process under the pulse ON condition shown in FIG. 12B accordingto the second embodiment, the process of step S405 is eliminated fromthe process under the pulse ON condition of the first embodiment asshown in FIG. 8B, and the process of steps S433 to S437 are addedinstead of step S430.

At step S433 in the process shown in FIG. 12B, the CPU 21 reads thevalue stored in the capture and time comparison matching register 61that is set as the capture register in step S340 shown in FIG. 12A, andinto which the value stored in the time counter 34 has already beencaptured. The value stored in the time counter 34 is a value when theignition pulse signal is switched from Low level to High level when itreceives the angle comparison matching signal transferred from thecomparator 33. That is, the CPU 21 reads such a captured value stored inthe capture and time comparison matching register 61.

At step S435, the CPU 21 adds the count value (more specifically, thatis the value obtained by dividing the regular time length “TH” by thetime period of one clock cycle used in the time counter 34) during theregular time length “TH” stored in the time counter 34 to the value readin step S433 (that is the value stored in the capture and timecomparison matching register 61). The CPU 21 then outputs the additionresult as the time “t12” that is the elapsed time of the regular timeperiod “TH” counted from the pulse ON time “t11”.

Similar to the process of the first embodiment shown in FIG. 8B, the CPU21 of the second embodiment sets the capture and time comparisonmatching register 61 which acts as the time comparison matching registerat step S437. Then, the operation step goes to S440 in which the time“t12” calculated in step S453 is set to the capture and time comparisonmatching register 61 set as the time comparison matching register.

As described above, according to the second embodiment, the pulse ONangle “an11” is set to the angle comparison matching register 32 in thepulse ON setting process shown in FIG. 12A, and the capture and timecomparison matching register 61 is used as the capture register when themode set value of 2 is set into the switch circuit 38.

In the process of the pulse ON condition shown in FIG. 12B, the CPU 21reads the value of the time counter 34 at the pulse ON time “t11” fromthe capture and time comparison matching register 61. The CPU 21 thencalculates the time “t12” to be set into the capture and time comparisonmatching register 61 as the time comparison matching register based onthe read value.

It is therefore possible to easily obtain the precious value in the timecounter 34 at the pulse ON time “t11”, and thereby possible to set theprecious value regarding the time “t12” into the capture and timecomparison matching register 61 that acts as the time comparisonmatching register. That is, the second embodiment can eliminate apossibility to cause an error caused by the processing delay occurred instep S405.

In the ignition pulse signal of the second embodiment, the pulse ONangle “an11” corresponds to the specified angle before the target angleas the output-inversion angle, and the timing of the pulse ON angle“an11” (that is the timing at which the ignition pulse signal isswitched to High level) corresponds to the reference timing at aspecified time. The time length “TH” corresponds to the regular timelength defined in claims. Further, the process at step S310 shown inFIG. 12A and the process from step S420 to step S440 corresponds to theprocess by the register value setting process defined in claims of thepresent invention.

As set forth in detail, although the concept of the present invention isnot limited by the above embodiments, it is possible to apply thepresent invention to various modifications within the scope of thepresent invention. For example, it is acceptable that the rotary body isa body other than the crank shaft of the engine used in the first andsecond embodiments. It is further acceptable to incorporate both a timecomparison matching register and a capture register instead of thecapture and time comparison matching register used in the secondembodiment. That is, it is possible to incorporate an additional captureregister in addition to the time comparison matching register 35 for thetimer module 29 shown in FIG. 2. In this case, it is possible toeliminate both the processes of step S140 and step S247 from the flowchart shown in FIG. 11A and FIG. 11B and to eliminate both the processesof step S340 and step S437 from the flow chart shown in FIG. 12A andFIG. 12B.

While specific embodiments of the present invention have been describedin detail, it will be appreciated by those skilled in the art thatvarious modifications and alternatives to those details could bedeveloped in light of the overall teachings of the disclosure.Accordingly, the particular arrangements disclosed are meant to beillustrative only and not limited to the scope of the present inventionwhich is to be given the full breadth of the following claims and allequivalent thereof.

1. A signal output unit comprising: an angle counter configured toperform a count operation in synchronization with a rotation of a rotarybody and to output an angle count value indicating a rotation angle ofthe rotary body; a first register in which a first comparison value isset, which is compared with the angle count value; a first comparatorconfigured to compare the angle count value with the first comparisonvalue, and to output a first comparison matching signal when the anglecounter value reaches the first comparison value; a time counterconfigured to perform a counting operation every a regular interval andto output a time count value; a second register in which a secondcomparison value is set, which is compared with the time count value;and a second comparator configured to compare the time count value withthe second comparison value, and to output a second comparison matchingsignal when the time count value reaches the second comparison value,wherein the signal output unit inverts a specified level of an outputsignal thereof and outputs the output signal of the inverted leveloutside when the first comparator outputs the first comparison matchingsignal and the second comparator outputs the second comparison matchingsignal.
 2. The signal output unit according to claim 1, wherein thespecified level of the output signal is a level indicating aninterruption of an electric power supply to a control target to becontrolled according to the output signal, and the inverted level of theoutput signal indicates an initiation of the electric power to thecontrol target.
 3. The signal output unit according to claim 2, furthercomprising a capture register configured to capture the time count valueoutput from the time counter when the first comparator outputs the firstcomparison match signal.
 4. An electronic control unit comprising: thesignal output unit according to claim 2; and a controller comprisingregister value setting means configured to set to the first register atarget angle of the rotary body as an output-inversion angle at whichthe level of the output signal from the signal output unit is invertedfrom the predetermined level to its inversion level, and configured toadd a count value for a regular time period counted by the time counterto a count value of the time counter at a reference timing at aspecified time, and to store the addition result to the second register.5. The signal output unit according to claim 1, wherein the specifiedlevel of the output signal indicates initiation of electric power supplyto a control target to be controlled according to the output signal, andthe inverted level of the output signal indicates interruption of theelectric power supply to the control target.
 6. The signal output unitaccording to claim 5, further comprising a capture register configuredto capture the time count value output from the time counter when thefirst comparator outputs the first comparison match signal.
 7. Thesignal output unit according to claim 1, further comprising a captureregister configured to capture the time count value output from the timecounter when the first comparator outputs the first comparison matchsignal.
 8. An electronic control unit comprising: the signal output unitaccording to claim 1; and a controller comprising register value settingmeans configured to set to the first register a target angle of therotary body as an output-inversion angle at which the level of theoutput signal from the signal output unit is inverted from thepredetermined level to its inversion level, and configured to add acount value for a regular time period counted by the time counter to acount value of the time counter at a reference timing at a specifiedtime, and to store the addition result to the second register.
 9. Theelectronic control unit according to claim 8, wherein the signal outputunit further comprises a capture register configured to capture the timecount value provided from the time counter when the first comparatoroutputs the first comparison match signal, the reference timingindicates a specified angle before the output-inversion angle of therotation angle of the rotary body, and the register value setting meansis configured to set the specified angle to the first register beforethe reference timing occurs, configured to read the time count valuestored in the capture register during a time from the reference timingto the time at which the rotation angle of the rotary body reaches thetarget angle as the output-inversion angle, configured to add the countvalue counted by the timer counter for the regular time period to thereadout time count value, and configured to store the added value to thesecond register.
 10. The electronic control unit according to claim 8,wherein on receiving the output signal from the signal output unit, thecontroller generates and outputs an ignition pulse signal to an injectormounted on a vehicle.